DFT Engineer - Semiconductors/Electronics (5-10 yrs)
We are looking for an experienced DFT Engineer with a strong background in scan insertion, ATPG, GLS debug, MBIST pattern generation, and validation. The ideal candidate will have hands-on experience in these areas and a basic understanding of DFT IPs, including OCC, EDT, SSN, MBIST controllers, IJTAG, IEEE 1600 standard, and Boundary Scan. The role requires independent task management and excellent debug skills.
Key Responsibilities:
- Perform scan insertion, ATPG, and GLS debug to ensure design integrity.
- Generate and validate MBIST patterns.
- Work with DFT IPs such as OCC, EDT, SSN, MBIST controllers, IJTAG, IEEE 1600 standard, and Boundary Scan.
- Handle tasks independently with minimal supervision.
- Utilize strong debug skills to resolve issues effectively.
- Apply working knowledge of TCL for enhanced performance and efficiency.
- Experience with Tessent DFT is preferred.
Qualifications:
- Hands-on experience with scan insertion, ATPG, GLS debug, MBIST pattern generation, and validation.
- Basic understanding of DFT IPs, including OCC, EDT, SSN, MBIST controllers, IJTAG, IEEE 1600 standard, and Boundary Scan.
- Ability to handle tasks independently and demonstrate strong debug skills.
- Working knowledge of TCL is an added advantage.
- Experience with Tessent DFT is preferred.
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