Manager - HCS at Vitasta Consulting Pvt. Ltd.
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DFT Lead - Electronics Design (8-12 yrs)
Position Name : DFT LEAD
Experience Band [Years] : 7-10 years
- Platform : Palladuim XP or Z1 (experience with either is fine)
Job Location : Bangalore
Educational Qualification(s) : BE/ME
Detailed Description of the Job Profile :
- Should have good knowledge about all DFT concepts. Scan insertion and validation, BIST insertion and validation, ATPG and Pattern Validation w/wo Timing, DFT mode timing Analysis and sign off.
- Work experience on various DFT architectures. Knowledge of protocol like IEEE1149.1, IEEE1149.6, IEEE1687 and IEEE1500.
- Worked on Pattern diagnosis and Familiarity with ATE, silicon bring up.
- Should have done 4 tape outs.
- Technical Skill [Required] :
Hands on experience in various DFT aspects like Scan insertion, MBIST and JTAG, ATPG, Pattern validation at block level as well as Fullchip level
- Synopsys tools : DFT MAX, TetraMAX OR
- Cadence tools: RTL Compiler, Encounter Test OR
- Mentor Graphics tools : Tessent tool chain, TestKompress
- Debussy, VCS/Questa/IUS
- PT tool from Synopsys
- Soft Skills [Required] - Strong in technical and non-technical communication to achieve results, Positive attitude and able to help Jr. team members
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