Executive HR at Source one
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Hardware Engineer - Design Verification/GLS (1-17 yrs)
Pre-Si design verification
1. RTL verification
2. GLS verification
3. Power Aware verification
4. Post-Si Vector generation and debug
Job Requirements :
- Educational requirement Bachelor or Masters in EE/ECE/CS or related specializations with 1 to 6 years of relevant experience
- Strong in UVM/System Verilog/C/C++/scripting, Simulation, Formal verification, Emulation, post Silicon validation
- Strong in digital design fundamentals, computer organization & architectures and bus protocols
- Good understanding of SoC Debug architectures, Design-for-Debug, Design-for-Test will be highly desirable.
- Hands on experience with front end EDA tools such as VCS/Questa/Incisive simulators, Debug tools and Formal verification tools
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